With dimensional scaling of semiconductor device, some problems arises, for example, threshold voltage decreases with the reduction of channel length, current leakage increases, etc. In other word, short channel effects arise in semiconductor device. Fin field effect transistor, namely, FinFET is developed to face the challenge from semiconductor design and manufacturing.
A fin in a FinFET device is generally designed as a cuboid structure to optimize device performance, however, the fin of a cuboid structure is fragile with poor stress tolerance. A triangle fin is adopted in most semiconductor design, which increases difficulties in many process steps, such as fin etching and source/drain implantation etcetera. Specifically, in source/drain implantation, tilt ion implantation is employed to realize uniform doping profile in fin structure. However, the method is critically affected by fin height and space size between neighboring fins, which involves complex process steps and non-uniform doping profiles.
A novel source/drain doping method for FinFET is provided to resolve the foregoing problems, comprising: forming shallow trench isolation (STI) structures on a semiconductor base after fins formed, wherein the STI structures have a higher top surface than those fins, and then forming sacrificial gate stacks on the STI structures, forming source/drain regions below the gate stacks and just in both ends of the fins which is embedded in the STI structures, such that a similarly planar structure is formed. Therefore, vertical ion implantation can be employed in source/drain implantation in FinFET manufacturing. Using the method disclosed in the present invention, harmful effects produced in source/drain implantation by triangle fin structures can be effectively avoided, device performance can be optimized, and process complexity can be reduced.